Recently updated on August 31st, 2024 at 12:29 am<\/p>","protected":false},"excerpt":{"rendered":"
The article presents a simplified method for evaluating the effect of parasitic capacitances in a conventional measurement setup described by the IEC 61869-11 standard.<\/p>\n","protected":false},"author":93,"featured_media":0,"comment_status":"open","ping_status":"closed","template":"","meta":{"_acf_changed":false,"footnotes":""},"tags":[1324,1343,1377],"targets":[1314],"pubblicazioni_tipologie":[773],"class_list":["post-192638","pubblicazioni","type-pubblicazioni","status-publish","hentry","tag-electricity-network-en","tag-legislation","tag-monitoring-and-control","targets-press-media-en","pubblicazioni_tipologie-isi-article-en"],"acf":{"projects":{"ID":191050,"post_author":"464","post_date":"2024-07-10 16:51:19","post_date_gmt":"2024-07-10 14:51:19","post_content":"","post_title":"Architecture and management models of the electrical system and grids","post_excerpt":"The project aims to develop methodologies, software tools, prototypes and demonstrators to optimise electric transmission and distribution grids, as well as new architecture and system management models and new regulatory schemes that encourage the integration of renewable and non-programmable generation, self-generation, storage systems and aggregators, and that take into account electric penetration.","post_status":"publish","comment_status":"open","ping_status":"closed","post_password":"","post_name":"architecture-and-management-models-of-the-electrical-system-and-grids","to_ping":"","pinged":"","post_modified":"2024-08-21 12:10:45","post_modified_gmt":"2024-08-21 10:10:45","post_content_filtered":"","post_parent":0,"guid":"https:\/\/www.rse-web.it\/progetti\/architecture-and-management-models-of-the-electrical-system-and-grids\/","menu_order":0,"post_type":"progetti","post_mime_type":"","comment_count":"0","filter":"raw"},"order_posts":"","dont_show_search":false,"related_posts":false,"dont_show_hompage":false,"show_on_slider":false,"single_post_data":{"titolo_spot":"","post_content":"
Parasitic Capacitances (PCs) are a serious problem in High Voltage (HV) applications. Their presence can alter the circuit configuration or operation of a device, with erroneous or even disastrous consequences. To this end, this work describes the modeling of PCs in HV capacitive dividers. This modeling is not based on finite element analyses or complicated geometries; instead it starts from an equivalent circuit of a conventional measurement setup described by the IEC 61869-11 standard. Once the equivalent model including the PCs has been found, the closed-form expressions of the PCs are derived from the definition of the ratio error. Subsequently, they are validated in a simulation environment, implementing various circuit configurations. The results demonstrate the applicability and effectiveness of the expressions: thanks to their simplicity, they can be implemented by system operators, researchers and manufacturers, avoiding the use of complicated methods and technologies.<\/p>\n","scarica_file":false,"link_estreno":[{"link_text":"Download ISI Article","link":"https:\/\/www.mdpi.com\/1996-1073\/14\/5\/1262"}],"button":{"text":"","link":""},"referente_group":false,"data_emissione":"2021-02-25","autori":"A. Mingotti, F. Costa, L. Peretto, R. Tinarelli (Universit\u00e0 di Bologna), P. Mazza (RSE S.p.A)","destinazione":"MDPI Energies 2021, 14(5), 1262, February 25, 2021","rif_rse":"21002504"},"satellite_post_url":""},"yoast_head":"\n