This work evaluated the analysis and subsequently optimized the control algorithm for a solid-state MVDC breaker with fault current limitation function. Real Time Control Hardware in The Loop (CHIL) hardware simulations were conducted and compared with software-only simulations, which served as the reference. Initially, the performance results were unsatisfactory, despite the control state machine being fundamentally correct. To expedite the system’s response, two different optimization approaches were adopted, both in software (SW) and hardware (HW). On the software side, the state machine was fully translated into low-level language (ANSI-C) to achieve maximum speed. On the hardware side, interrupts were set up to enforce the execution of code segments in response to external logic signals. The overall result was a substantial improvement in system performance. The final outcomes were satisfactory in achieving the expected goals in terms of response speed and controllability. Additionally, selected commercial components were chosen to compile a parts list, and approximate calculations demonstrated reasonable equipment efficiency under operating conditions.